Chen Xiaofei
·Paper Publications
- [11] [11] Zhixiong Ren, Kefeng Zhang, Lanqi Liu, Xiaofei Chen, Dongsheng Liu, Zhenglin Liu, Xuecheng Zou, A 2.45-GHz W-level Output Power CMOS Power Amplifier with Adaptive Bias and Integrated Diode Linearizer, Microelectronics Journal, 46 (5): 327–332, May 2015(SCI: WOS:000353863600001).
- [12] [12] Ang Hu, Zhixiong Ren, Kefeng Zhang, Lanqi Liu, Xiaofei Chen, Dongsheng Liu, Xuecheng Zou, Low-phase-noise wideband VCO with optimised sub-nH inductor, 2015, Electronics Letters, 51 (15): 1209–1211, July 2015 (WOS:000358124000043 ).
- [13] [13] 夏方达，张科峰，陈晓飞，一种提高分段式DAC线性度测试效率的方法，半导体技术，40(7):554-558, July 2015.
- [14] [14] 陈晓飞，沈军，张力，林双喜, 高线性度CMOS射频AB类功率放大器设计, 微电子学与计算机，31(6): 145-148, June 2014.
- [15] [15] Zhixiong Ren, Kefeng Zhang, Xiaofei Chen and Zhenglin Liu, Scalable CMOS power combiner, Electronics Letters, 50 (6): 431–432, March 2014 (sci: WOS:000333409000007 ).
- [16] [16] 陈晓飞，邹俊，沈军，张力，基于UC3843的锂离子电池组均衡电路设计，电力电子技术，48 (1): 79-80, Jan. 2014.
- [17] [17] 陈晓飞，李小晶，邹雪城，林双喜, 带有源巴伦的CMOS宽带低噪声放大器设计, 18luck新利电竞 学报(自然科学版) , 2013, 41(5): 45-47.
- [18] [18] Chen Xiaofei, Shen Yading, Zou Xuecheng，Lin Shuangxi, Zou Wanghui, “A New High Performance RF LDMOS with Vertical n+n-p-p+ Drain Structure” in the IEEE 10th International Conference on ASIC (ASICON2013), pp. 523-526, Oct. 28-31, 2013, Shenzhen, China. (EI: 20142217772769).
- [19] [19] Zou Wanghui, Chen Xiaofei, Zou Xuecheng. “An Improved Analytical Series Resistance Model for On-Chip Stacked Inductors” in the IEEE 10th International Conference on ASIC (ASICON2013), Oct. 28-31, 2013, Shenzhen, China..
- [20] [20] Chen Xiaofei, Liu Fanhong, Zou Xuecheng，Lin Shuangxi. “A Linearized VBE Bandgap Voltage Reference with Wide Temperature Range” in the IEEE 10th International Conference on ASIC (ASICON2013), p. 838-841, Oct. 28-31, 2013, Shenzhen, China..